A device and method with data preprocessing are disclosed. The device with preprocessing includes a first memory configured to store raw data, and a field programmable gate array (FPGA) in which reconfigurable augmentation modules are programmed, where the FPGA includes a decoder configured to decode the raw data, a second memory configured to store the decoded raw data, and a processor, where the processor is configured to determine target augmentation modules, from among the reconfigurable augmentation modules, based on a data preprocessing pipeline, perform the data preprocessing pipeline using the determined target augmentation modules to generate augmented data, including an augmentation of at least a portion of the decoded raw data stored in the second memory using an idle augmentation module, from among the target augmentation modules, and implement provision of the augmented data to a graphics processing unit (GPU) or Neural Processing Unit (NPU).