Semiconductor integrated circuit device
Abstract:
In a p-type region, a nanosheet farthest from an n-type region has a face exposed from a first gate interconnect on the side away from the n-type region in the Y direction. In the n-type region, a nanosheet farthest from the p-type region has a face exposed from a second gate interconnect on the side away from the p-type region in the Y direction. In the p-type region, a nanosheet closest to the n-type region has a face exposed from the first gate interconnect on the side closer to the n-type region in the Y direction. In the n-type region, a nanosheet closest to the p-type region has a face exposed from the second gate interconnect on the side closer to the p-type region in the Y direction.
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