Static random access memory circuit and read/write operation method thereof
Abstract:
A static random-access memory (SRAM) circuit and associated read operation method and write operation method are provided. The SRAM circuit includes memory units arranged in M columns and N rows, M bit lines, N row-voltage selection lines, N word lines, and a control circuit. The control circuit includes a controller, a voltage source, a voltage selection module, a word-line driving module, and a bit-line driving module. The voltage source provides a first voltage and a second voltage. When the control circuit performs access to the memory unit located in the mth column and the nth row, the voltage selection module transmits one of the first voltage and the second voltage to an nth row-voltage selection line. The voltage selection module transmits the second voltage to the other (N−1) row-voltage selection lines. The variables M, N, m, and n are positive integers.
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