Invention Grant
- Patent Title: Semiconductor structure and manufacturing method thereof
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Application No.: US18310527Application Date: 2023-05-01
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Publication No.: US12255095B2Publication Date: 2025-03-18
- Inventor: Yu-Kai Lin , Su-Jen Sung , Tze-Liang Lee , Jen-Hung Wang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/311 ; H01L23/522 ; H01L23/532

Abstract:
A semiconductor structure including a substrate, a first dielectric layer, a first conductive feature, an etch stop layer, a second dielectric layer and a second conductive feature is provided. The first dielectric layer is disposed over the substrate. The first conductive feature is disposed in the first dielectric layer. The etch stop layer is disposed over the first dielectric layer and the first conductive feature, wherein the etch stop layer comprises a metal-containing layer and a silicon-containing layer, the metal-containing layer is located between the first dielectric layer and the silicon-containing layer, the metal-containing layer comprises a nitride-containing region and an oxide-containing region, and the nitride-containing region contacts the first conductive feature. The second dielectric layer is disposed over the etch stop layer. The second conductive feature penetrates the second dielectric layer and electrically connects with the first conductive feature.
Public/Granted literature
- US20230274975A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2023-08-31
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