Invention Grant
- Patent Title: Method for manufacturing semiconductor device having diode connectedto memory device
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Application No.: US17707445Application Date: 2022-03-29
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Publication No.: US12267994B2Publication Date: 2025-04-01
- Inventor: Hsih-Yang Chiu
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: MUNCY, GEISSLER, OLDS & LOWE, P.C.
- Main IPC: H10B12/00
- IPC: H10B12/00 ; G11C11/406

Abstract:
The present disclosure provides a method for manufacturing a semiconductor device. The method includes providing a substrate. The substrate comprises a first well region having a first conductive type. The method also includes forming a first gate structure on the substrate. The method further includes forming a first doped region in the substrate. The first doped region has a second conductive type different from the first conductive type. The first gate structure and the first doped region are included in a first transistor. In addition, the method includes forming a capacitor structure electrically coupled to the first doped region of the substrate. The method also includes forming a second doped region in the substrate. The second doped region has the second conductive type, the second doped region and the first well region collectively serve a diode, and the second doped region is electrically coupled to the first electrode of the capacitor structure and the first doped region.
Public/Granted literature
- US20230320064A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE HAVING DIODE CONNECTEDTO MEMORY DEVICE Public/Granted day:2023-10-05
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