Invention Grant
- Patent Title: Stacked FET sidewall strap connections between gates
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Application No.: US17706675Application Date: 2022-03-29
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Publication No.: US12274089B2Publication Date: 2025-04-08
- Inventor: Chen Zhang , Julien Frougier , Ruilong Xie , Heng Wu
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Matthew Zehrer
- Main IPC: H01L23/532
- IPC: H01L23/532 ; H01L23/535 ; H10D30/67 ; H10D62/10 ; H10D84/01 ; H10D84/03 ; H10D84/85

Abstract:
A set of stacked transistors, system, and method to connect the gates of stacked field-effect transistors through sidewall straps. The set of stacked transistors may include a first transistor including a first gate. The set of stacked transistors may also include a second transistor including a second gate, where the second transistor is above the first transistor. The set of stacked transistors may also include a dielectric preventing direct contact between the first gate and the second gate. The set of stacked transistors may also include a first sidewall strap proximately connected to the first gate and the second gate, where the first sidewall strap connects the first transistor and the second transistor.
Public/Granted literature
- US20230317727A1 STACKED FET SIDEWALL STRAP CONNECTIONS BETWEEN GATES Public/Granted day:2023-10-05
Information query
IPC分类: