Invention Grant
- Patent Title: Modular construction of hybrid-bonded semiconductor die assemblies and related systems and methods
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Application No.: US17830224Application Date: 2022-06-01
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Publication No.: US12278202B2Publication Date: 2025-04-15
- Inventor: Bharat Bhushan , Akshay N. Singh , Bret K. Street , Debjit Datta , Eiichi Nakano
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/00

Abstract:
Stacked semiconductor assemblies, and related systems and methods, are disclosed herein. A representative stacked semiconductor assembly can include a lowermost die and two or more modules carried by an upper surface of the lowermost die. Each of the module(s) can include a base die and one or more upper dies and/or an uppermost die carried by the base die. Each of the dies in the module is coupled via hybrid bonds between adjacent dies. Further, the base die in a lowermost module is coupled to the lowermost die by hybrid bonds. As a result of the modular construction, the lowermost die can have a first longitudinal footprint, the base die in each of the module(s) can have a second longitudinal footprint smaller than the first longitudinal footprint, and each of the upper die(s) and/or the uppermost die can have a third longitudinal footprint smaller than the second longitudinal footprint.
Public/Granted literature
- US20230395545A1 MODULAR CONSTRUCTION OF HYBRID-BONDED SEMICONDUCTOR DIE ASSEMBLIES AND RELATED SYSTEMS AND METHODS Public/Granted day:2023-12-07
Information query
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