Invention Grant
- Patent Title: IC logic device, layout, system, and method
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Application No.: US17750168Application Date: 2022-05-20
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Publication No.: US12278240B2Publication Date: 2025-04-15
- Inventor: I-Wen Wang , Chia-Chun Wu , Hui-Zhong Zhuang , Yung-Chen Chien , Jerry Chang Jui Kao , Xiangdong Chen
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: H01L27/00
- IPC: H01L27/00 ; H01L27/118 ; G06F30/392

Abstract:
An IC device includes first and second power rails extending in a first direction and carrying one of a power supply or reference voltage, a third power rail extending between the first and second power rails and carrying the other of the power supply or reference voltage, and a plurality of transistors including first through fourth active areas extending between the first and second power rails, a plurality of gate structures extending perpendicularly to the first direction, and first and second conductive segments extending in the second direction across the third power rail. Each of the second and third active areas is adjacent to the third power rail, each of the first and second conductive segments is electrically connected to S/D structures in each of the second and third active areas, and the plurality of transistors is configured as one of an AOI, an OAI, or a four-input NAND gate.
Public/Granted literature
- US20230261002A1 IC LOGIC DEVICE, LAYOUT, SYSTEM, AND METHOD Public/Granted day:2023-08-17
Information query
IPC分类: