Invention Grant
- Patent Title: Non-volatile memory including negative capacitance blocking oxide layer, operating method of the same and manufacturing method of the same
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Application No.: US18197189Application Date: 2023-05-15
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Publication No.: US12279436B2Publication Date: 2025-04-15
- Inventor: Sanghun Jeon , Taeho Kim
- Applicant: Korea Advanced Institute of Science and Technology
- Applicant Address: KR Daejeon
- Assignee: Korea Advanced Institute of Science and Technology
- Current Assignee: Korea Advanced Institute of Science and Technology
- Current Assignee Address: KR Daejeon
- Agency: Verrill Dana, LLP
- Priority: KR10-2022-0059004 20220513
- Main IPC: H10B51/30
- IPC: H10B51/30 ; G11C11/22 ; H10B51/20

Abstract:
Disclosed are a non-volatile memory including a negative capacitance blocking oxide layer, an operating method of the same, and a manufacturing method of the same. The non-volatile memory may include a tunneling oxide layer formed on a channel; a charge storage layer formed on one surface of the tunneling oxide layer; a negative capacitance blocking oxide layer in which a dielectric layer and an imprinted polarization layer are sequentially configured on one surface of the charge storage layer; and a gate formed on one surface of the negative capacitance blocking oxide layer.
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