A memory circuit comprises a signal buffer, a plurality of switch circuits, a temperature sensor, a path-length-compensation circuit and at least one data latch. The signal buffer is configured to receive a strobe signal. The plurality of switch circuits are coupled to the signal buffer through a plurality of signal paths respectively, wherein the lengths of the plurality of signal paths are equal. The temperature sensor is coupled to the plurality of switch circuits and configured to conduct one of the plurality of switch circuits according to temperature of the memory circuit. The path-length-compensation circuit comprises a plurality of input terminals connected in series, which are configured to respectively receive outputs of the plurality of switch circuits. The at least one data latch is coupled to an output terminal of the path-length-compensation circuit and configured to store or output data according to output of the path-length-compensation circuit.