A power electronics assembly including a circuit board assembly including a plurality of electrically conductive logic layers, a plurality of electrically conductive power layers, and a laminate panel provided between the plurality of electrically conductive logic layers and the plurality of electrically conductive logic layers. The laminate panel includes a power electronics device assembly including a substrate and a power electronics device. The substrate includes a graphite layer and a metal layer encasing the graphite layer. A recess is formed in an outer surface of the metal layer. The power electronics device is bonded within the recess of the outer surface of the substrate. Each electrically conductive logic layer is provided at a first surface of the laminate panel, and each electrically conductive power layer is provided at a second surface of the laminate panel opposite the first surface of the laminate panel.