Invention Grant
- Patent Title: Integrated circuit structure and method with hybrid orientation for FinFET
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Application No.: US18355895Application Date: 2023-07-20
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Publication No.: US12302640B2Publication Date: 2025-05-13
- Inventor: Tzer-Min Shen , Zhiqiang Wu , Chung-Cheng Wu , Ching-Wei Tsai , Kuan-Lun Cheng , Chih-Hao Wang , Min Cao
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: HAYNES AND BOONE, LLP
- Main IPC: H10D87/00
- IPC: H10D87/00 ; H01L21/762 ; H10D30/62 ; H10D30/67 ; H10D62/10 ; H10D62/17 ; H10D62/40 ; H10D84/01 ; H10D84/03 ; H10D84/85 ; H10D86/00 ; H10D86/01

Abstract:
The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a first region and a second region; a first fin active region of a first semiconductor material disposed within the first region, oriented in a first direction, wherein the first fin active region has a crystalline direction along the first direction; and a second fin active region of a second semiconductor material disposed within the second region and oriented in the first direction, wherein the second fin active region has a crystalline direction along the first direction.
Public/Granted literature
- US20230411399A1 Integrated Circuit Structure and Method with Hybrid Orientation for FinFET Public/Granted day:2023-12-21
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