Invention Grant
- Patent Title: 3DIC with heat dissipation structure and warpage control
-
Application No.: US18543819Application Date: 2023-12-18
-
Publication No.: US12322673B2Publication Date: 2025-06-03
- Inventor: Kuo-Chiang Ting , Sung-Feng Yeh , Ta Hao Sung , Jian-Wei Hong
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/373
- IPC: H01L23/373 ; H01L23/00 ; H01L23/498 ; H01L25/065

Abstract:
A method includes bonding a bottom die to a carrier, and bonding a top die to the bottom die. The top die includes a semiconductor substrate, and the semiconductor substrate has a first thermal conductivity. The method further includes encapsulating the top die in a gap-fill region, bonding a supporting substrate to the top die and the gap-fill region to form a reconstructed wafer, wherein the supporting substrate has a second thermal conductivity higher than the first thermal conductivity, de-bonding the reconstructed wafer from the carrier, and forming electrical connectors on the bottom die.
Public/Granted literature
- US20250069985A1 3DIC WITH HEAT DISSIPATION STRUCTURE AND WARPAGE CONTROL Public/Granted day:2025-02-27
Information query
IPC分类: