Invention Grant
- Patent Title: Integrated circuit (IC) package with substrate having validation connectors
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Application No.: US16895964Application Date: 2020-06-08
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Publication No.: US12322685B2Publication Date: 2025-06-03
- Inventor: Luis Ricardo Perez-Corona , Maria Jose Garcia-Garcia de Leon , Ricardo Astro-Bohorquez , Francisco Javier Ramirez-Aldana
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/00

Abstract:
Embodiments herein describe techniques for an IC package including a package substrate. The package substrate includes a set of validation connectors formed on a first side of the package substrate, a first set of functional connectors formed on the first side of the package substrate, and a second set of functional connectors formed on a second side of the package substrate opposite to the first side. A validation connector of the set of validation connectors is arranged to be coupled with a validation connector of an IC die placed above the first side of the package substrate. A first functional connector of the first set of functional connectors is arranged to be coupled with a functional connector of the IC die. A second functional connector of the second set of functional connectors is arranged to be coupled through the first functional connector to the functional connector of the IC die.
Public/Granted literature
- US20200303291A1 INTEGRATED CIRCUIT (IC) PACKAGE WITH SUBSTRATE HAVING VALIDATION CONNECTORS Public/Granted day:2020-09-24
Information query
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