Invention Grant
- Patent Title: Semiconductor structure and manufacturing method thereof
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Application No.: US17661237Application Date: 2022-04-28
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Publication No.: US12324140B2Publication Date: 2025-06-03
- Inventor: Xiang Liu
- Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Applicant Address: CN Hefei
- Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Current Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Current Assignee Address: CN Hefei
- Agency: Syncoda LLC
- Agent Feng Ma
- Priority: CN202110997638.7 20210827
- Main IPC: H10B12/00
- IPC: H10B12/00 ; H01L21/311 ; H01L21/768

Abstract:
The present disclosure provides a semiconductor structure and a manufacturing method thereof. The manufacturing method of the semiconductor structure includes: forming a first patterned mask layer on an upper surface of a first filling dielectric layer, the first patterned mask layer including a plurality of pattern units; etching the first filling dielectric layer based on the first patterned mask layer to form etched recesses; forming a second filling dielectric layer, the second filling dielectric layer filling up the etched recesses and covering the first patterned mask layer; removing the first patterned mask layer, and parts of the second filling dielectric layer on the first patterned mask layer and between the pattern units; removing the remaining first filling dielectric layer to form a plurality of capacitor contact holes exposing the substrate; and forming, in the capacitor contact holes, capacitor contact structures located on the two opposite sides of the BLs.
Public/Granted literature
- US20230068654A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2023-03-02
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