Invention Grant
- Patent Title: Semiconductor device including write transistor and read transistor having read word line and read bit line at opposite ends of read channel layer
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Application No.: US17825133Application Date: 2022-05-26
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Publication No.: US12324142B2Publication Date: 2025-06-03
- Inventor: Mir Im
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si
- Priority: KR10-2021-0138870 20211018
- Main IPC: H10B12/00
- IPC: H10B12/00

Abstract:
A semiconductor device includes a memory cell including a write transistor and a read transistor that are electrically connected to each other. The write transistor includes a write bit line disposed over a substrate, a write channel structure disposed on the write bit line and extending in a direction perpendicular to a surface of the substrate on the write bit line, a write gate dielectric layer disposed on a side surface of the write channel structure, and a write word line disposed on the write gate dielectric layer. The read transistor includes a read gate electrode layer disposed on the write channel structure, a read gate dielectric layer disposed on the read gate electrode layer, a read channel layer disposed on the read gate dielectric layer, and a read word line and a read bit line that are disposed at opposite ends of the read channel layer.
Public/Granted literature
- US20230122541A1 SEMICONDUCTOR DEVICE INCLUDING WRITE TRANSISTOR AND READ TRANSISTOR Public/Granted day:2023-04-20
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