The embodiments of the present application provide a semiconductor structure manufacturing method for forming a semiconductor structure. The method includes: forming a plurality of discrete transistor structures (102) on a substrate (101); forming a dielectric layer (111) covering the transistor structure (102); forming a plurality of metal lines (103) on the top surface of the dielectric layer (111); forming an opening (105) in the gap between two of the plurality of metal lines (103); the insulation layer (106) fills the opening (105), the dielectric constant of the insulating layer (106) is smaller than the dielectric constant of the dielectric layer, and therefore the insulating layer (106) reduces the parasitic capacitance between the metal lines (103) as well as the parasitic capacitance between the metal lines (103) and the transistor structure (102); this method discloses how to form plurality of metal lines in the chip array area, meanwhile keeping the parasitic capacitance between the formed metal lines and other conductive structures small.