Invention Grant
- Patent Title: Liner structures
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Application No.: US17872348Application Date: 2022-07-25
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Publication No.: US12324232B2Publication Date: 2025-06-03
- Inventor: Tsung-Chieh Hsiao , Johnson Chen , Tzung-Yi Tsai , Tsung-Lin Lee , Yen-Ming Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: HAYNES AND BOONE, LLP
- Main IPC: H10D84/83
- IPC: H10D84/83 ; H01L21/321 ; H10D30/01 ; H10D30/62 ; H10D84/01 ; H10D84/03

Abstract:
A semiconductor device includes a fin structure over a substrate. The fin structure includes a bottom portion and a top portion. The bottom and the top portions have different materials. The device also includes a liner layer on a sidewall of the bottom portion, a dielectric layer on side surfaces of the liner layer, an interfacial layer, and a gate structure over the dielectric layer and engages the fin structure. A top surface of the liner layer extends below a bottom surface of the top portion. The interfacial layer has a first section on and directly contacting sidewall surfaces of the bottom portion and a second section on and directly contacting top and sidewall surfaces of the top portion. The gate structure includes a high-k dielectric layer and a metal gate electrode over the high-k dielectric layer. The high-k dielectric layer directly contacts the first section of the interfacial layer.
Public/Granted literature
- US20220359509A1 NOVEL LINER STRUCTURES Public/Granted day:2022-11-10
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