A decoder for the MIL-STD-1553B bus which operates at a slower clock rate than the 40 MHz industry standard clock rate. This embodiment uses a 10 MHz clock rate. Because the clock rate is slower than the 40 MHz clock rate, the invention will inherently use less power. Additional features of this invention include: flexible resolution timestamp input, error checking and reporting throughout the decode process and 32 bit buffered parallel output of the bus controller and remote terminal communication. In another embodiment the decoder has a plurality of n ancillary clocks which provide partial state timestamps, which are summable to create a system timestamp.