Invention Grant
- Patent Title: Forming recesses in molding compound of wafer to reduce stress
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Application No.: US18302521Application Date: 2023-04-18
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Publication No.: US12334474B2Publication Date: 2025-06-17
- Inventor: Chun-Hung Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/56 ; H01L21/78 ; H01L23/31 ; H01L25/065 ; H10D89/00
Abstract:
A chip includes a semiconductor substrate, an electrical connector over the semiconductor substrate, and a molding compound molding a lower part of the electrical connector therein. A top surface of the molding compound is lower than a top end of the electrical connector. A recess extends from the top surface of the molding compound into the molding compound.
Public/Granted literature
- US20230253370A1 Forming Recesses in Molding Compound of Wafer to Reduce Stress Public/Granted day:2023-08-10
Information query
IPC分类:
