Invention Grant
- Patent Title: Methods and apparatus to prevent lock-up of high-speed pseudo-differential frequency divider circuits
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Application No.: US18240278Application Date: 2023-08-30
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Publication No.: US12334924B2Publication Date: 2025-06-17
- Inventor: Robert Taft , Alexander Bodem , Filip Savic , Paul Kramer , Vineethraj Rajappan Nair
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Mandy Barsilai Fernandez; Frank D. Cimino
- Main IPC: G06F1/08
- IPC: G06F1/08 ; H03K19/20 ; H03K21/00
Abstract:
An example apparatus includes: first through eighth gated inverters each having inputs and outputs; a first and second inverter each having an input and an output, the output of the first inverter coupled to the input of the second gated inverter, the output of the second inverter coupled to the input of the third gated inverter; the fifth gated inverter coupled to the input of the first gated inverter and the input of the first inverter; the sixth gated inverter coupled to the input of the second inverter and the input of the fourth gated inverter; the seventh gated inverter coupled to the output of the first gated inverter and the output of the third gated inverter; the eighth gated inverter coupled to the output of the second gated inverter and the output of the fourth gated inverter; and a bus-holder circuit between the seventh and eighth gated inverter inputs.
Public/Granted literature
- US20250080117A1 METHODS AND APPARATUS TO PREVENT LOCK-UP OF HIGH-SPEED PSEUDO-DIFFERENTIAL FREQUENCY DIVIDER CIRCUITS Public/Granted day:2025-03-06
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