A decision feedback equalizer includes an adder, a comparison device, a register, and a decision feedback coefficient (DFC) generator. The comparison device includes N data comparator(s), each of which includes a feedback compensation circuit, an input-stage circuit, a gain-stage circuit, and a latch in sequence. The feedback compensation circuit determines a degree of compensation according to feedback coefficients from the DFC generator and feedback compensation bits from the N data comparator(s), so that the input-stage circuit, the gain-stage circuit, and the latch can process an analog input signal from the adder according to the degree of compensation and thereby output a data comparison result to the register. The DFC generator determines the feedback coefficients according to the data comparison result.