A wiring board includes a pair of hard substrates provided for each of a plurality of semiconductor elements connected in parallel; a soft substrate provided so as to be at least partially sandwiched between all of the pairs of hard substrates; a first electrode configured to connect a control terminal of the semiconductor element and the hard substrate or the soft substrate; a second electrode configured to connect a reference potential terminal of the semiconductor element and the hard substrate or the soft substrate; a first wiring configured to connect in parallel the first electrodes of each of the plurality of semiconductor elements, at least part of the first wiring being provided on the soft substrate; and a second wiring configured to connect in parallel the second electrodes of each of the plurality of semiconductor elements, at least part of the second wiring being provided on the soft substrate.