Invention Grant
- Patent Title: Gate spacer and formation method thereof
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Application No.: US17696257Application Date: 2022-03-16
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Publication No.: US12336249B2Publication Date: 2025-06-17
- Inventor: Yi-Rui Chen , Yi-Fan Chen , Szu-Ying Chen , Sen-Hong Syue , Huicheng Chang , Yee-Chia Yeo
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H10D64/01
- IPC: H10D64/01 ; H01L21/02 ; H10D64/66 ; H10D30/01

Abstract:
A method of forming a semiconductor device includes forming a sacrificial gate structure over a substrate, depositing a spacer layer on the sacrificial gate structure in a conformal manner, performing a multi-step oxidation process to the spacer layer, etching the spacer layer to form gate sidewall spacers on opposite sidewalls of the sacrificial gate structure, removing the sacrificial gate structure to form a trench between the gate sidewalls spacers, and forming a metal gate structure in the trench.
Public/Granted literature
- US20230299175A1 GATE SPACER AND FORMATION METHOD THEREOF Public/Granted day:2023-09-21
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