Invention Grant
- Patent Title: Static random access memory supporting a single clock cycle read-modify-write operation with a modulated word line assertion
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Application No.: US18196152Application Date: 2023-05-11
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Publication No.: US12340099B2Publication Date: 2025-06-24
- Inventor: Praveen Kumar Verma , Harsh Rawat
- Applicant: STMicroelectronics International N.V.
- Applicant Address: CH Geneva
- Assignee: STMicroelectronics International N.V.
- Current Assignee: STMicroelectronics International N.V.
- Current Assignee Address: CH Geneva
- Agency: Crowe & Dunlevy LLC
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
A read-modify-write operation is performed, within a single cycle of a clock signal, by: decoding an address to select a word line of a memory; applying a word line signal at a first voltage level to the selected word line; reading a current data word from a data word location in the memory; reducing the word line signal from the first voltage level to the second voltage level; performing a mathematical modify operation internally within the memory on the current data word to generate a modified data word; increasing the word line signal from the second voltage level to the first voltage level; and writing the modified data word back to the location in the memory.
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