In an aspect, a memory device includes page buffers and a controller coupled to the page buffers. Each of the page buffers includes N data latches configured to store data, where N is a positive integer. The controller is configured to receive data that includes data units, wherein each of the data units includes N bits, store the data units in the N data latches, convert the data stored in the N data latches based on a table, and program cells of the memory device based on the converted data. The table include N rows and 2N columns of bits. Bits from column 2N−1+2 to column 2N in Nth row of the table are identical.