Invention Grant
- Patent Title: Methods and apparatus for using structural elements to improve drop/shock resilience in semiconductor devices
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Application No.: US17591519Application Date: 2022-02-02
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Publication No.: US12341110B2Publication Date: 2025-06-24
- Inventor: Koustav Sinha , Quang Nguyen , Christopher Glancey , Shams U. Arifeen
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/498

Abstract:
A semiconductor package assembly includes a first mounting surface of a package substrate that faces a second mounting surface of a printed circuit board. A first structural element bond pad is mounted to the first mounting surface. A second structural element bond pad is mounted to the second mounting surface, and the first and second structural element bond pads are aligned with each other. A structural element is interconnected with a first solder joint to the first structural element bond pad and interconnected with a second solder joint to the second structural element bond pad. The structural element extends between the first and second structural element bond pads to absorb mechanical shock when a compressive force pushes one of the first and second mounting surfaces toward the other.
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