Invention Grant
- Patent Title: Semiconductor chip and semiconductor device including a copper pillar and an intermediate layer
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Application No.: US18423463Application Date: 2024-01-26
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Publication No.: US12341120B2Publication Date: 2025-06-24
- Inventor: Shoji Takei , Yuji Koga
- Applicant: ROHM CO., LTD.
- Applicant Address: JP Kyoto
- Assignee: ROHM CO., LTD.
- Current Assignee: ROHM CO., LTD.
- Current Assignee Address: JP Kyoto
- Agency: Rabin & Berdo, P.C.
- Priority: JP2019-068474 20190329
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/31 ; H01L23/532

Abstract:
A semiconductor device includes a semiconductor layer having a first surface, an insulating layer formed at the first surface of the semiconductor layer, a Cu conductive layer formed on the insulating layer, the Cu conductive layer made of a metal mainly containing Cu, a second insulating layer formed on the insulating layer, the second insulating layer covering the Cu conductive layer, a Cu pillar extending in a thickness direction in the second insulating layer, the Cu pillar made of a metal mainly containing Cu and electrically connected to the Cu conductive layer, and an intermediate layer formed between the Cu conductive layer and the Cu pillar, the intermediate layer made of a material having a linear expansion coefficient smaller than a linear expansion coefficient of the Cu conductive layer and smaller than a linear expansion coefficient of the Cu pillar.
Public/Granted literature
- US20240170436A1 SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE INCLUDING A COPPER PILLAR AND AN INTERMEDIATE LAYER Public/Granted day:2024-05-23
Information query
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