Invention Grant
- Patent Title: Stacked die RF circuits and package method thereof
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Application No.: US17835650Application Date: 2022-06-08
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Publication No.: US12341133B2Publication Date: 2025-06-24
- Inventor: Cemin Zhang
- Applicant: Chengdu Sicore Semiconductor Corp. Ltd.
- Applicant Address: CN Chengdu
- Assignee: Chengdu Sicore Semiconductor Corp. Ltd.
- Current Assignee: Chengdu Sicore Semiconductor Corp. Ltd.
- Current Assignee Address: CN Chengdu
- Agent Michael North
- Priority: CN202210320285.1 20220329
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/00 ; H01L23/48 ; H01L23/522 ; H01L23/528

Abstract:
Various embodiments for die stacking are disclosed in the present disclosure for improved performance in RF circuit integration and packaging. In various layouts, a first die may be flipped and stacked on a second die via one or more bumping pillars coupled between the dies. The bumping pads may be disposed on the first die, the second die, or both. The bumping pads may comprise ground bumping pads for ground connection, RF signal bumping pads for cross-die RF signal transmission, and/or control bumping pads for biasing or logic control. Furthermore, the ground bumping pads and the RF signal bumping pad may form a ground-signal-ground pad structure for smooth RF signal transmission. The present embodiments may integrate a silicon-based die with an III-V semiconductor-based die together for a small form factor package with the well-defined ground to handle RF signals over millimeter-wave frequencies at high power levels.
Public/Granted literature
- US20230317682A1 STACKED DIE RF CIRCUITS AND PACKAGE METHOD THEREOF Public/Granted day:2023-10-05
Information query
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