Invention Grant
- Patent Title: Glitch reduction in high-speed differential receivers
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Application No.: US18326418Application Date: 2023-05-31
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Publication No.: US12341520B2Publication Date: 2025-06-24
- Inventor: Jitender Kapil , Srikanth Vellore Avadhanam Ramamurthy
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Mandy Barsilai Fernandez; Frank D. Cimino
- Main IPC: H03K5/1252
- IPC: H03K5/1252 ; H03K5/24

Abstract:
A differential transceiver including a driver circuit and a receiver circuit, and a serial communications network including the transceiver. The receiver circuit includes an input resistor attenuator, having first and second attenuator inputs coupled to the first and second terminals, respectively, a differential comparator having first and second comparator inputs, and an output buffer having an input coupled to the output of the comparator. The receiver circuit further includes a first switch coupling the first attenuator output to the first comparator input, a second switch coupling the second attenuator output to the second comparator input, and a fail-safe circuit including first and second current sources coupled to the first and second comparator inputs, respectively, and third and fourth switches coupled in series between the first and second current sources.
Public/Granted literature
- US20240405760A1 Glitch Reduction in High-Speed Differential Receivers Public/Granted day:2024-12-05
Information query
IPC分类: