Invention Application
US20020186592A1 Reading circuit and method for a multilevel non-volatile memory
有权
多电平非易失性存储器的读取电路和方法
- Patent Title: Reading circuit and method for a multilevel non-volatile memory
- Patent Title (中): 多电平非易失性存储器的读取电路和方法
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Application No.: US10118660Application Date: 2002-04-08
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Publication No.: US20020186592A1Publication Date: 2002-12-12
- Inventor: Mauro Pagliato , Paolo Rolandi , Massimo Montanaro
- Applicant: STMicroelectronics S.r.I.
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.I.
- Current Assignee: STMicroelectronics S.r.I.
- Current Assignee Address: IT Agrate Brianza
- Priority: IT01830248.9 20010410
- Main IPC: G11C011/34
- IPC: G11C011/34

Abstract:
Described herein is an asynchronous serial dichotomic sense amplifier comprising a first comparator stage having a first input receiving the cell current flowing in the multilevel memory cell, the content of which is to be read, a second input receiving a first reference current, and an output supplying the first of the bits stored in the multilevel memory cell; a multiplexer stage having a selection input connected to the output of the first comparator stage, a first signal input receiving a second reference current, a second signal input receiving a third reference current, and a signal output selectively connectable to the first or the second signal input depending on the logic level present on the selection input; and a second comparator stage having a first input receiving the cell current, a second input connected to the signal output of the multiplexer stage, and an output supplying the second of the bits stored in the multilevel memory cell.
Public/Granted literature
- US06657895B2 Reading circuit and method for a multilevel non-volatile memory Public/Granted day:2003-12-02
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