Invention Application
- Patent Title: [METHOD OF FABRICATING CIRCUIT SUBSTRATE]
- Patent Title (中): [制作电路基板的方法]
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Application No.: US10710561Application Date: 2004-07-21
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Publication No.: US20050017058A1Publication Date: 2005-01-27
- Inventor: Kwun-Yao Ho , Moriss Kung
- Applicant: Kwun-Yao Ho , Moriss Kung
- Priority: TW92119806 20030721; TW92126141 20030923; TW93106926 20040316
- Main IPC: B23K1/00
- IPC: B23K1/00 ; B23K1/19 ; B23K1/20 ; H01L21/48 ; H05K3/24 ; H05K3/28 ; B23K31/02
![[METHOD OF FABRICATING CIRCUIT SUBSTRATE]](/abs-image/US/2005/01/27/US20050017058A1/abs.jpg.150x150.jpg)
Abstract:
The present invention provides a method of fabricating a circuit substrate. First, a substrate having first pads and second pads is provided, wherein the first pads and second pads are arranged respectively on a first surface and a second surface of the substrate. The first pads are electrically connected to the second pads. Next, a conductive seed layer is formed on the second surface of the circuit substrate. Thereafter, a first conductive layer and a second conductive layer are electroplated respectively over the first pads and the second pads. Afterwards, the conductive seed layer is patterned.
Public/Granted literature
- US06896173B2 Method of fabricating circuit substrate Public/Granted day:2005-05-24
Information query
IPC分类: