Invention Application
- Patent Title: Electrical interface for memory connector
- Patent Title (中): 内存连接器的电气接口
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Application No.: US11296632Application Date: 2005-12-07
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Publication No.: US20070128896A1Publication Date: 2007-06-07
- Inventor: Dan Willis , David Kraus
- Applicant: Dan Willis , David Kraus
- Main IPC: H05K1/00
- IPC: H05K1/00

Abstract:
According to some embodiments, a connector to receive a memory module includes a first row of a first plurality of interconnect ends, a second row of a second plurality of interconnect ends adjacent to the first row, and a third row of a third plurality of interconnect ends adjacent to the second row. An interconnect end of the first plurality of interconnect ends, an interconnect end of the second plurality of interconnect ends, and an interconnect end of the third plurality of interconnect ends may be substantially aligned.
Public/Granted literature
- US07458821B2 Electrical interface for memory connector Public/Granted day:2008-12-02
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