Invention Application
- Patent Title: Multilayer board having layer configuration indicator portion
- Patent Title (中): 具有层配置指示器部分的多层板
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Application No.: US11785794Application Date: 2007-04-20
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Publication No.: US20070248800A1Publication Date: 2007-10-25
- Inventor: Chihiro Mitsui , Chikara Shimada
- Applicant: Chihiro Mitsui , Chikara Shimada
- Applicant Address: JP Echizen-city
- Assignee: ORION ELECTRIC CO., LTD.
- Current Assignee: ORION ELECTRIC CO., LTD.
- Current Assignee Address: JP Echizen-city
- Priority: JP2006-120209 20060425
- Main IPC: B32B3/00
- IPC: B32B3/00

Abstract:
The invention provides a layer configuration indicator portion enabling the configuration of layers to be identified easily in a multilayer board. The configuration of the respective layers of a multilayer board can be identified easily by applying two copper foils per a single layer for a number corresponding to the number of layers constituting the multilayer board on an outer layer of the multilayer board, by which layer configuration identification marks are composed, and displaying a maximum of six types of configurations per each layer by having three types of statuses indicated on the layer configuration indication marks, which are “covering the mark with resist”, “covering the mark with resist and silk”, and “not covering the mark with resist or silk”.
Information query