Invention Application
US20120142136A1 WAFER LEVEL PACKAGING PROCESS FOR MEMS DEVICES
审中-公开
MEMS器件的WAFER LEVEL PACKAGING PROCESS
- Patent Title: WAFER LEVEL PACKAGING PROCESS FOR MEMS DEVICES
- Patent Title (中): MEMS器件的WAFER LEVEL PACKAGING PROCESS
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Application No.: US12957928Application Date: 2010-12-01
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Publication No.: US20120142136A1Publication Date: 2012-06-07
- Inventor: Robert D. Horning , Jeff A. Ridley
- Applicant: Robert D. Horning , Jeff A. Ridley
- Applicant Address: US NJ Morristown
- Assignee: HONEYWELL INTERNATIONAL INC.
- Current Assignee: HONEYWELL INTERNATIONAL INC.
- Current Assignee Address: US NJ Morristown
- Main IPC: H01L31/18
- IPC: H01L31/18

Abstract:
A process for packaging micro-electro-mechanical systems (MEMS) devices comprises providing a lower cover wafer and an upper cover wafer, providing a semiconductor wafer including a plurality of MEMS devices on a substrate layer, bonding the semiconductor wafer to a first surface of the lower cover wafer, and bonding a second surface of the upper cover wafer to the semiconductor wafer. The first surface of the lower cover wafer and the second surface of the upper cover wafer define a plurality of hermetically sealed cavity sections when bonded to the semiconductor wafer such that each of the MEMS devices is located inside one of the sealed cavity sections. A plurality of holes are formed that extend from the first surface of the upper cover wafer to the second surface of the upper cover wafer after the upper cover wafer is bonded to the semiconductor wafer. A metal lead layer is then deposited in each of the holes to provide an electrical connection with the MEMS devices.
Information query
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