Invention Application
US20150364430A1 Semiconductor Device and Method of Forming a Dampening Structure to Improve Board Level Reliability 审中-公开
半导体器件和形成阻尼结构的方法以提高电路板级可靠性

  • Patent Title: Semiconductor Device and Method of Forming a Dampening Structure to Improve Board Level Reliability
  • Patent Title (中): 半导体器件和形成阻尼结构的方法以提高电路板级可靠性
  • Application No.: US14305560
    Application Date: 2014-06-16
  • Publication No.: US20150364430A1
    Publication Date: 2015-12-17
  • Inventor: Yaojian Lin
  • Applicant: STATS ChipPAC, Ltd.
  • Main IPC: H01L23/00
  • IPC: H01L23/00 H01L21/56 H01L23/528 H01L21/768
Semiconductor Device and Method of Forming a Dampening Structure to Improve Board Level Reliability
Abstract:
A semiconductor device has a semiconductor die. An encapsulant is deposited over the semiconductor die. A first insulating layer is formed over the semiconductor die and encapsulant. A plurality of first grooves is formed in the first insulating layer. A first conductive layer is formed over the first insulating layer and in the first grooves. A second insulating layer is formed over the first conductive layer. A plurality of second grooves is formed in the second insulating layer. A second conductive layer is formed in the second grooves. An interconnect structure is disposed over the second conductive layer and the first and second grooves. The first conductive layer disposed in the first grooves and the second conductive layer disposed in the second grooves form a dampening structure under the interconnect structure. The dampening structure improves the TCoB and BLR of the semiconductor device.
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