Invention Application
- Patent Title: Bump-on-Trace Design for Enlarge Bump-to-Trace Distance
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Application No.: US14990515Application Date: 2016-01-07
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Publication No.: US20160118360A1Publication Date: 2016-04-28
- Inventor: Sheng-Yu Wu , Tin-Hao Kuo , Chen-Shien Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L25/065 ; H01L23/528

Abstract:
A package includes a first and a second package component. The first package component includes a first metal trace and a second metal trace at the surface of the first package component. The second metal trace is parallel to the first metal trace. The second metal trace includes a narrow metal trace portion having a first width, and a wide metal trace portion having a second width greater than the first width connected to the narrow metal trace portion. The second package component is over the first package component. The second package component includes a metal bump overlapping a portion of the first metal trace, and a conductive connection bonding the metal bump to the first metal trace. The conductive connection contacts a top surface and sidewalls of the first metal trace. The metal bump is neighboring the narrow metal trace portion.
Public/Granted literature
- US10515919B2 Bump-on-trace design for enlarge bump-to-trace distance Public/Granted day:2019-12-24
Information query
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