Invention Application
US20160204110A1 METHODS OF FORMING BURIED VERTICAL CAPACITORS AND STRUCTURES FORMED THEREBY
有权
形成BURIED垂直电容器的方法及其形成的结构
- Patent Title: METHODS OF FORMING BURIED VERTICAL CAPACITORS AND STRUCTURES FORMED THEREBY
- Patent Title (中): 形成BURIED垂直电容器的方法及其形成的结构
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Application No.: US14912402Application Date: 2013-09-25
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Publication No.: US20160204110A1Publication Date: 2016-07-14
- Inventor: Rajashree Baskaran , Kimin JUN , Patrick MORROW
- Applicant: Rajashree BASKARAN , Kimin JUN , Patrick MORROW
- International Application: PCT/US2013/061538 WO 20130925
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L49/02
Abstract:
Methods of forming passive elements under a device layer are described. Those methods and structures may include forming at least one passive structure, such as a capacitor and a resistor structure, in a substrate, wherein the passive structures are vertically disposed within the substrate. An insulator layer is formed on a top surface of the passive structure, a device layer is formed on the insulator layer, and a contact is formed to couple a device disposed in the device layer to the at least one passive structure.
Public/Granted literature
- US09646972B2 Methods of forming buried vertical capacitors and structures formed thereby Public/Granted day:2017-05-09
Information query
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