Invention Application
- Patent Title: INTEGRATED CIRCUIT STACK INCLUDING A PATTERNED ARRAY OF ELECTRICALLY CONDUCTIVE PILLARS
- Patent Title (中): 集成电路堆栈，包括导电支柱阵列
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Application No.: US14692154Application Date: 2015-04-21
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Publication No.: US20160315055A1Publication Date: 2016-10-27
- Inventor: Eric E. Vogt , Gregor D. Dougal , James L. Tucker
- Applicant: Honeywell International Inc.
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/498 ; H01L25/00 ; H01L23/28 ; H01L21/56
Abstract:
The present disclosure describes a stacked integrated circuit system that includes two integrated circuit layers stacked on opposite sides of an interposer layer. The interposer layer may include at least one integrated circuit die and an interposer portion that includes a plurality of electrically conductive pillars arranged in a laterally patterned array within the interposer layer.
Public/Granted literature
- US09548277B2 Integrated circuit stack including a patterned array of electrically conductive pillars Public/Granted day:2017-01-17
Information query
IPC分类:
