Invention Application
US20170025370A1 CHIP SCALE SENSING CHIP PACKAGE AND A MANUFACTURING METHOD THEREOF
审中-公开
芯片尺寸感应芯片包装及其制造方法
- Patent Title: CHIP SCALE SENSING CHIP PACKAGE AND A MANUFACTURING METHOD THEREOF
- Patent Title (中): 芯片尺寸感应芯片包装及其制造方法
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Application No.: US15209723Application Date: 2016-07-13
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Publication No.: US20170025370A1Publication Date: 2017-01-26
- Inventor: Yin-Chen CHEN , Jan-Lian LIAO , Ming-Chieh HUANG , Jyh-Wei CHEN , Hsi-Chien LIN
- Applicant: XINTEC INC.
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/768 ; H01L23/31 ; H01L21/683 ; H01L21/78

Abstract:
This present invention provides a method of manufacturing a chip scale sensing chip package, comprising the steps of: providing a sensing device wafer having a first top surface and a first bottom surface opposite to each other, whereby the sensing device wafer comprises a plurality of chip areas, and each of the chip areas comprising a sensing device and a plurality of conductive pads adjacent to the sensing chip nearby the first top surface; providing a cap wafer having a second top surface and a second bottom surface opposite to each other, and bonding the second surface of the cap wafer to the first top surface of the sensing device wafer by sandwiching a first adhesive layer therebetween; providing a temporary carrier substrate, and bonding the temporary carrier substrate to the second top surface of the cap wafer by sandwiching a second adhesive layer therebetween; forming a wiring layer connecting to each of the conductive pads on the first bottom surface of the sensing device wafer; providing a first protective layer on the wiring layer; removing the temporary carrier substrate and the second adhesive layer; forming a second protective layer on the second top surface; removing the first protective layer; scribing the chip areas to generate a plurality of individual chip scale sensing chip package; and removing the second protective layer.
Information query
IPC分类: