• Patent Title: DC OFFSET CANCELLATION CIRCUIT
  • Application No.: US15488365
    Application Date: 2017-04-14
  • Publication No.: US20170302238A1
    Publication Date: 2017-10-19
  • Inventor: SeongHun Jeong
  • Applicant: FCI Inc.
  • Priority: KR10-2016-0046406 20160415
  • Main IPC: H03F3/45
  • IPC: H03F3/45 H03G3/30 H03F3/189
DC OFFSET CANCELLATION CIRCUIT
Abstract:
Disclosed herein is a DC offset cancellation circuit. The DC offset cancellation circuit includes a DC feedback unit configured to vary a DC feedback (DCFB) bandwidth to add at least one mid-bandwidth to the DCFB bandwidth and to provide a delay time in each case in order to reduce the DC droop error that occurs in switching from the high bandwidth (BW) to the mid-BW or from the mid-BW mode to the low BW mode, such that stable settling is ensured.
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