Invention Application
- Patent Title: Low-Temperature Dopant Activation Process Using a Cap Layer, and MOS Devices Including the Cap Layer
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Application No.: US16030269Application Date: 2018-07-09
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Publication No.: US20190013203A1Publication Date: 2019-01-10
- Inventor: Raghav SREENIVASAN , Aditi CHANDRA , Arvind KAMATH
- Applicant: Raghav SREENIVASAN , Aditi CHANDRA , Arvind KAMATH
- Main IPC: H01L21/228
- IPC: H01L21/228 ; H01L21/02 ; H01L21/8238 ; H01L27/092

Abstract:
A method of making a MOS device, a MOS device containing an aluminum nitride layer, and a CMOS circuit are disclosed. The method includes depositing an aluminum nitride layer on a structure including a silicon layer, depositing a dopant ink on the structure, and diffusing the dopant through the aluminum nitride layer into the silicon layer. The structure also includes a gate oxide layer on the silicon layer and a gate on the gate oxide layer. The dopant ink includes a dopant and a solvent. The MOS device includes a silicon layer, a gate oxide layer on the silicon layer, a gate on the gate oxide layer, and an aluminum nitride layer on the gate. The silicon layer includes a dopant on opposite sides of the gate.
Information query
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