Invention Application
- Patent Title: LITHOGRAPHIC CAVITY FORMATION TO ENABLE EMIB BUMP PITCH SCALING
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Application No.: US15934343Application Date: 2018-03-23
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Publication No.: US20190295951A1Publication Date: 2019-09-26
- Inventor: Kristof DARMAWIKARTA , Hiroki TANAKA , Robert MAY , Sameer PAITAL , Bai NIE , Jesse JONES , Chung Kwang Christopher TAN
- Applicant: Intel Corporation
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L23/522 ; H01L23/00

Abstract:
Embodiments include an electronic package with an embedded multi-interconnect bridge (EMIB) and methods of making such packages. Embodiments include a first layer, that is an organic material and a second layer disposed over the first layer. In an embodiment, a cavity is formed through the second layer to expose a first surface of the first layer. A bridge substrate is in the cavity and is supported by the first surface of the first layer. Embodiments include a first die over the second layer that is electrically coupled to a first contact on the bridge substrate, and a second die over the second layer that is electrically coupled to a second contact on the bridge substrate. In an embodiment the first die is electrically coupled to the second die by the bridge substrate.
Public/Granted literature
- US11322444B2 Lithographic cavity formation to enable EMIB bump pitch scaling Public/Granted day:2022-05-03
Information query
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