A wiring design method and a wiring structure for a package substrate in a flip chip, and a flip chip. The wiring design method includes: arranging bump pads in an array of rows and columns, wherein the bump pads are configured to bond with conductive bumps on a flip chip die, and the bump pads comprise signal pads and non-signal pads; providing the non-signal pad with a via hole; and using a layer of wiring to lead a subset of the signal pads out of an orthographic projection region of the flip chip die on the package substrate, wherein the subset of the signal pads is configured to carry all functional signals required by design specifications of the flip chip die for the array of the bump pads.