Invention Publication
- Patent Title: HIERARCHICAL ASYMMETRIC CORE ATTRIBUTE DETECTION
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Application No.: US17530936Application Date: 2021-11-19
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Publication No.: US20230161618A1Publication Date: 2023-05-25
- Inventor: Michael L. Golden , Paul Blinzer , Magiting M. Talisayon , Srikanth Masanam , Ripal Butani , Upasanah Swaminathan
- Applicant: ADVANCED MICRO DEVICES, INC.
- Applicant Address: US CA Santa Clara
- Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F9/48
- IPC: G06F9/48

Abstract:
Within a processing system, thread count asymmetries manifest when one or more cores of a processing device are disabled. To determine such thread count asymmetries, discovery operations are performed to determine thread count asymmetries for one or more hierarchy levels of a processing device based on a number of threads per enumerated instance within the hierarchy level. In response to the determining a thread count asymmetry, one thread identifier for each enumerated instance within the asymmetric hierarchy level is defined to determine a representation of the asymmetry. Using the representation of the symmetry, software tasks associated with one or more application within the processing system are performed.
Public/Granted literature
- US12056522B2 Hierarchical asymmetric core attribute detection Public/Granted day:2024-08-06
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