Invention Publication
- Patent Title: Method and apparatus for testing a package-on-package semiconductor device
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Application No.: US18299173Application Date: 2023-04-12
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Publication No.: US20230349968A1Publication Date: 2023-11-02
- Inventor: Chin-Yi OUYANG , Xin-Yi WU , Chien-Ming CHEN , Meng-Kung LU , Chia-Hung CHIEN
- Applicant: CHROMA ATE INC.
- Applicant Address: TW Taoyuan City
- Assignee: CHROMA ATE INC.
- Current Assignee: CHROMA ATE INC.
- Current Assignee Address: TW Taoyuan City
- Priority: TW 1116376 2022.04.29
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
The present invention relates to an apparatus for testing a package-on-package semiconductor device, mainly comprising a pick-and-place device, a test socket, an upper chip holder, and a main controller. When a first package device is to be tested, the main controller controls the pick-and-place device to load the first package device into the test socket and then controls the pick-and-place device to transfer the upper chip holder and bring the upper chip holder into electrical contact with the first package device on the test socket so that a second package device in the upper chip holder is electrically connected to the first package device for testing. Accordingly, the upper chip holder is an independent component. Only when a test is executed, the pick-and-place device transfers the upper chip holder onto the test socket so that the second package device is electrically connected to the first package device.
Information query