Invention Publication
- Patent Title: SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR PREPARING THE SAME
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Application No.: US18381911Application Date: 2023-10-19
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Publication No.: US20240047394A1Publication Date: 2024-02-08
- Inventor: SHING-YIH SHIH
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW NEW TAIPEI CITY
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW NEW TAIPEI CITY
- Main IPC: H01L23/00
- IPC: H01L23/00

Abstract:
A semiconductor package structure includes a first semiconductor wafer including a first bonding pad. The semiconductor package structure also includes a second semiconductor wafer including a second bonding pad and a third bonding pad. The second bonding pad and the third bonding pad are bonded to the first bonding pad of the first semiconductor wafer. The semiconductor package structure further includes a first via penetrating through the second semiconductor wafer to physically contact the first bonding pad of the first semiconductor wafer. A portion of the first via is disposed between the second bonding pad and the third bonding pad.
Public/Granted literature
- US12205912B2 Semiconductor package structure and method for preparing the same Public/Granted day:2025-01-21
Information query
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