Invention Publication
- Patent Title: INTEGRATED CIRCUIT INCLUDING THREE-DIMENSIONAL MEMORY DEVICE
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Application No.: US18516908Application Date: 2023-11-21
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Publication No.: US20240090231A1Publication Date: 2024-03-14
- Inventor: Bo-Feng Young , Yi-Ching Liu , Sai-Hooi Yeong , Yih Wang , Yu-Ming Lin
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H10B51/40
- IPC: H10B51/40 ; G11C11/22 ; H01L23/522 ; H10B43/30 ; H10B43/40 ; H10B43/50 ; H10B51/20 ; H10B51/30 ; H10B51/50

Abstract:
An integrated circuit is provided. The integrated circuit includes a three-dimensional memory device, a first word line driving circuit and a second word line driving circuit. The three-dimensional memory device includes stacking structures separately extending along a column direction. Each stacking structure includes a stack of word lines. The stacking structures have first staircase structures at a first side and second staircase structures at a second side. The word lines extend to steps of the first and second staircase structures. The first and second word line driving circuits lie below the three-dimensional memory device, and extend along the first and second sides, respectively. Some of the word lines in each stacking structure are routed to the first word line driving circuit from a first staircase structure, and others of the word lines in each stacking structure are routed to the second word line driving circuit from a second staircase structure.
Public/Granted literature
- US12137571B2 Integrated circuit including three-dimensional memory device Public/Granted day:2024-11-05
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