Invention Publication
- Patent Title: METHOD OF FORMING OXIDE-NITRIDE-OXIDE STACK OF NON-VOLATILE MEMORY AND INTEGRATION TO CMOS PROCESS FLOW
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Application No.: US17954141Application Date: 2022-09-27
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Publication No.: US20240107771A1Publication Date: 2024-03-28
- Inventor: Michael ALLEN , Krishnaswamy RAMKUMAR
- Applicant: Infineon Technologies LLC
- Applicant Address: US CA San Jose
- Assignee: Infineon Technologies LLC
- Current Assignee: Infineon Technologies LLC
- Current Assignee Address: US CA San Jose
- Main IPC: H01L27/11568
- IPC: H01L27/11568 ; H01L21/02

Abstract:
A fabrication method of a semiconductor device is described. Generally, the method includes forming a customizable oxide-nitride-oxide (ONO) stack over a substrate in an in-situ atomic layer deposition (ALD) tool or chamber. Radical oxidation or oxide deposition process steps are performed to form tunnel dielectric layer overlying the substrate. Silicon nitride deposition process steps are also performed to form a multi-layer charge trapping (CT) layer in which at least some of the process parameters of silicon nitride deposition process steps are adjusted when forming the first and second CT sub-layers of the multi-layer CT layer. Subsequently, radical oxidation or oxide deposition process steps are performed in the ALD tool to form a blocking dielectric layer overlying the multi-layer CT layer.
Public/Granted literature
- US12232324B2 Method of forming oxide-nitride-oxide stack of non-volatile memory and integration to CMOS process flow Public/Granted day:2025-02-18
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