Invention Publication
- Patent Title: ANTI-FUSE AND FUSE STRUCTURES FOR IMPROVING THE FUNCTIONALITY OF QUBIT CIRCUITS
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Application No.: US17936845Application Date: 2022-09-29
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Publication No.: US20240113015A1Publication Date: 2024-04-04
- Inventor: Vivekananda P. Adiga , Russell A. Budd , Charles Thomas Rettner , Stephen M. Gates
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY ARMONK
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY ARMONK
- Main IPC: H01L23/525
- IPC: H01L23/525

Abstract:
A method of constructing a superconducting switch includes depositing a thin sacrificial layer on top of a substrate. The sacrificial layer is patterned to remove portions of the sacrificial layer except at a first portion of the substrate. A superconducting metal layer is patterned on top of the substrate and on top of the sacrificial layer. The superconducting metal layer is patterned to form a superconducting metal line over the sacrificial layer. The patterned sacrificial layer is etched from under the superconducting metal line to release the metal line from the substrate.
Public/Granted literature
- US12218048B2 Anti-fuse and fuse structures for improving the functionality of qubit circuits Public/Granted day:2025-02-04
Information query
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